TY - GEN
T1 - Designing agent chips
AU - Song, Insu
AU - Governatori, Guido
PY - 2006
Y1 - 2006
N2 - We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized into gate level specifications for direct fabrication of silicon chips1. The method is applied for designing agent chips incorporating similar features found in the BDI (Belief, Desire, and Intention) and Brooks' subsumption architectures.
AB - We outline meta-encoding schemas for compiling nonmonotonic logic theories into Verilog HDL (Hardware Description Language) descriptions. These descriptions can be synthesized into gate level specifications for direct fabrication of silicon chips1. The method is applied for designing agent chips incorporating similar features found in the BDI (Belief, Desire, and Intention) and Brooks' subsumption architectures.
KW - Agent programming languages
UR - http://www.scopus.com/inward/record.url?scp=34247232655&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34247232655&partnerID=8YFLogxK
U2 - 10.1145/1160633.1160874
DO - 10.1145/1160633.1160874
M3 - Conference paper
AN - SCOPUS:34247232655
SN - 1595933034
SN - 9781595933034
T3 - Proceedings of the International Conference on Autonomous Agents
SP - 1311
EP - 1313
BT - Proceedings of the Fifth International Joint Conference on Autonomous Agents and Multiagent Systems
T2 - Fifth International Joint Conference on Autonomous Agents and Multiagent Systems, AAMAS
Y2 - 8 May 2006 through 12 May 2006
ER -