We present an FPGA implementation of an integer-based MIPS processor using the Handel-C hardware design language (HDL). The processor is implemented on the RC200 development board from Celoxica. The processor implementation is modified from the standard MIPS architecture to lake into account the limitations and features of the board. A face detection system is implemented with the processor to show its application towards real-time image processing.
|Title of host publication||Proceedings of the IEEE Region 10 Annual International Conference/TENCON|
|Publication status||Published - 01 Dec 2004|
|Event||IEEE TENCON 2004 - 2004 IEEE Region 10 Conference: Analog and Digital Techniques in Electrical Engineering - Chiang Mai, Thailand|
Duration: 21 Nov 2004 → 24 Nov 2004
|Conference||IEEE TENCON 2004 - 2004 IEEE Region 10 Conference: Analog and Digital Techniques in Electrical Engineering|
|Period||21/11/04 → 24/11/04|