Low-Cost Gate Drive for Enhancement Mode SiC JFET Devices

Yoong Heng Chan, Yung C. Liang, David Tien

Research output: Book chapter/Published conference paperConference paper

1 Citation (Scopus)
4 Downloads (Pure)

Abstract

The main objective of this work is to develop a low cost gate drive circuit for the enhancement mode SiC JFET device with a comparable switching performance as those of commercial ones. To achieve this low cost requirement, the gate drive circuit design needs to use only components which are widely available. In this paper, the proposed SiC JFET gate drive circuit design is described and its switching performance is experimentally verified. The targeted cost per gate drive circuit is made to be less than US$10, which is a sizeable cost reduction in comparison to a commercially available gate drive.
Original languageEnglish
Title of host publicationProceedings of 2013 IEEE Energy Conversion Congress and Exposition
Place of PublicationUnited States
PublisherIEEE, Institute of Electrical and Electronics Engineers
Pages736-739
Number of pages4
ISBN (Electronic)9781479904839
DOIs
Publication statusPublished - 2013
Event2013 IEEE Energy Conversion Congress and Exposition (ECCE) - Colorado Convention Center, Denver, United States
Duration: 15 Sep 201319 Sep 2013
https://web.archive.org/web/20130606061404/http://www.ecce2013.org/ (Archived page)

Conference

Conference2013 IEEE Energy Conversion Congress and Exposition (ECCE)
CountryUnited States
CityDenver
Period15/09/1319/09/13
Internet address

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  • Cite this

    Heng Chan, Y., Liang, Y. C., & Tien, D. (2013). Low-Cost Gate Drive for Enhancement Mode SiC JFET Devices. In Proceedings of 2013 IEEE Energy Conversion Congress and Exposition (pp. 736-739). IEEE, Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ECCE-Asia.2013.6579183