Synthesis of full-adder circuit using reversible logic

Research output: Book chapter/Published conference paper › Conference paper › peer-review

Original language	English
Title of host publication	VLSI Design, 2004. Proceedings. 17th International Conference on
Pages	757-760
Number of pages	4
Publication status	Published - 2004

Cite this

@inproceedings{8ba1955d727a4b6190da8552e974c9ba,

title = "Synthesis of full-adder circuit using reversible logic",

author = "Babu, \{Hafiz Md Hasan\} and Islam, \{Md Rafiqul\} and Chowdhury, \{Syed Mostahed Ali\} and Chowdhury, \{Ahsan Raja\}",

year = "2004",

language = "English",

pages = "757--760",

booktitle = "VLSI Design, 2004. Proceedings. 17th International Conference on",

}